A light emitting diode is a device for performing a light emitting operation when a voltage of a turn-on voltage or more is applied thereto through anode and cathode terminals thereof. Generally, the turn-on voltage for causing the light emitting diode to emit light has a value much lower than the voltage of a common power source. Therefore, the light emitting diode has a disadvantage in that it cannot be used directly under the common AC power source of 110V or 220V. The operation of the light emitting diode using the common AC power source requires a voltage converter for lowering the supplied AC voltage. Accordingly, a driving circuit for the light emitting diode should be provided, which becomes one factor causing fabrication costs of an illuminating apparatus including the light emitting diode to be increased. Since a discrete driving circuit should be provided, the volume of the illuminating apparatus is increased and unnecessary heat is generated. In addition, there are problems such as improvement of a power factor for the supplied power.
To use the common AC power source in a state where a discrete voltage converting means is excluded, there has been suggested a method of constructing an array by connecting a plurality of light emitting diode chips in series to one another. To implement the light emitting diodes as an array, the light emitting diode chips should be formed into individual packages. Thus, a substrate separating process, a packaging process for a separated light emitting diode chip, and the like are required, and a mounting process of arranging the packages on an array substrate and a wiring process for forming wirings between electrodes of the packages are additionally required. Therefore, there are problems in that a processing time for constructing the array is increased, and fabrication costs of the array are increased.
Moreover, wire bonding is used for the wiring process of forming the array, and a molding layer for protecting bonding wires is additionally formed on an entire surface of the array. Accordingly, there is a problem in that a molding process of forming the molding layer is additionally required, resulting in increase in the complexity of processes. Particularly, in a case of application of a chip type with a lateral structure, the light-emitting performance of the light emitting diode chip is lowered, and the quality of the light emitting diode is deteriorated due to the generation of heat.
In order to solve the aforementioned problems, there has been proposed a light emitting diode chip array in which an array including a plurality of light emitting diode chips is fabricated as a single package.
In Korean Patent Laid-Open Publication No. 2007-0035745, a plurality of lateral type light emitting diode chips are electrically connected on a single substrate through metal wiring formed using an air bridge process. According to this laid-open publication, there is an advantage in that a discrete packaging process is not required for each of the individual chips, and an array is formed on a wafer level. However, the air bridge connection structure results in weak durability and the lateral type causes a problem of deterioration of the light-emitting performance or heat-dissipating performance.
In U.S. Pat. No. 6,573,537, a plurality of flip-chip type light emitting diodes is formed on a single substrate. However, n- and p-electrodes of each of the light emitting diodes are exposed to the outside in a state where the n- and p-electrodes are separated from each other. Therefore, a wiring process of connecting a plurality of electrodes to one another should be added in order to use a single power source. To this end, a submount substrate is used in the US patent. That is, the flip-chip type light emitting diodes should be mounted on a discrete submount substrate for wiring between the electrodes. At least two electrodes for electrical connection with another substrate should be formed on a back surface of the submount substrate. In the US patent, since the flip-chip type light emitting diodes are used, there is an advantage of improvement of the light-emitting performance and heat-dissipating performance. On the contrary, the use of the submount substrate causes increase in both fabrication costs and the thickness of a final product. In addition, there are further disadvantages of needs for an additional wiring process for the submount substrate and an additional process of mounting the submount substrate on a new substrate.
Korean Patent Laid-Open Publication No. 2008-0002161 discloses a configuration in which flip-chip type light emitting diodes are connected in series to one another. According to the laid-open patent publication, a packaging process on a chip basis is not required, and the use of the flip-chip type light emitting diodes exhibits an effect of improvement of the light-emitting performance and heat-dissipating performance. However, a discrete reflective layer is used in addition to wiring between n-type and p-type semiconductor layers, and interconnection wiring is used on the n-type electrode. Therefore, a plurality of patterned metal layers should be formed. To this end, various kinds of masks should be used, which becomes a problem. In addition, exfoliation or crack occurs due to a difference in thermal expansion coefficient between the n-electrode and the interconnection electrode, or the like, and therefore, there is a problem in that electrical contact therebetween is opened.